1. Field of the Invention
The present invention relates to a silicon substrate and a method of manufacturing the same, and more particularly, to a technique applicable for a silicon substrate for a solid-state imaging device that has high gettering capability and is used to manufacture a solid-state imaging device.
Priority is claimed on Japanese Patent Application No. 2008-054840, filed Mar. 5, 2008, and Japanese Patent Application No. 2008-054841, filed Mar. 5, 2008, the content of which is incorporated herein by reference.
2. Description of Related Art
A solid-state imaging device is manufactured by slicing a single crystal silicon pulled by, for example, a CZ (Czochralski) method into a silicon substrate and forming a circuit on the silicon substrate. When impurities, such as heavy metal, are mixed with the silicon substrate, electrical characteristics of the solid-state imaging device significantly deteriorate due to, for example, the generation of white spots.
For example, impurities, such as heavy metal, are mixed with the silicon substrate by the following two causes: first, metal contamination during a process of manufacturing a silicon substrate including single crystal pulling, slice, chamfering, and surface treatments, such as, polishing, grinding, and etching; and second, heavy metal contamination during a solid-state imaging device manufacturing process of forming a circuit on the silicon substrate.
In the related art, the following methods have been used to prevent the mixture of heavy metal: an IG (intrinsic gettering) method of forming an oxygen precipitate on a silicon substrate; and an EG (extrinsic gettering) method of forming a gettering site, such as backside damage, on the rear surface of a silicon substrate.
A technique for implanting carbon ions in order to reduce white spots generated due to a dark current that has an effect on the electrical characteristics of a solid-state imaging device is disclosed in JP-A-6-338507 and JP-A-2002-353434. In addition, an example of the EG method is disclosed in JP-A-2006-313922 (paragraph [0005]). Further, a technique related to carbon ion implantation is disclosed in JP-A-2006-313922.
As such, a silicon substrate obtained by an intrinsic gettering method that performs an oxygen precipitate heat treatment before epitaxial growth to form an oxygen precipitate has been used for a solid-state imaging device. Alternatively, a silicon substrate obtained by an ion implantation method that implants ions, such as carbon ions, into a silicon substrate has been used for a solid-state imaging device.
However, when an n/n+/n substrate used for a device that is operated at high speed, such as a CCD (charge coupled device) or a CIS (CMOS image sensor) is manufactured, there is a problem in that device characteristics deteriorate. That is, when a solid-state imaging device is manufactured from a substrate having an n+ epitaxial silicon layer (or an n+ type layer) and an n epitaxial silicon layer formed on an n silicon CZ substrate, contaminated heavy metal is segregated on a portion of a photodiode, which is a main part of the solid-state imaging device, in which a charge is stored, that is, a portion of the n+ epitaxial silicon layer (or the n+ type layer) serving as a phosphorus getter. As a result, device characteristics deteriorate.
In this case, the n type (n) corresponds to a phosphorus (P) concentration in the range of about 1.0×1016 atoms/cm3 to 1.0×1018 atoms/cm3. The n+ type (n+) corresponds to a phosphorus (P) concentration in the range of about 1.0×1018 atoms/cm3 to 1.0×1020 atoms/cm3. The n− type (n−) corresponds to a phosphorus (P) concentration in the range of about 1.0×1014 atoms/cm3 to 1.0×1016 atoms/cm3. The n+ type corresponds to a resistivity in the range of about 8×10−3 Ωcm to 10×10−3 Ωcm. The n− type corresponds to a resistivity in the range of about 0.1 Ωcm to 100 Ωcm. An n++ type (n++) corresponds to a resistivity in the range of about 0.1×10−3 Ωcm to 0.01×10−3 Ωcm.
In the intrinsic gettering method, it is necessary to form an oxygen precipitate in a silicon substrate in advance. Therefore, the intrinsic gettering method requires multi-stage heat treatment processes, which result in an increase in manufacturing costs. In addition, in the intrinsic gettering method, a heat treatment needs to be performed at a high temperature for a long time. Therefore, there is a concern that the metal contamination of a silicon substrate will increase during a heat treatment process or between the heat treatment processes.
On the other hand, in the extrinsic gettering method, for example, backside damage is formed on the rear surface of a silicon substrate. That is, in the extrinsic gettering method, metal contamination occurs during a manufacturing process, which results in a device defect.
When a high-temperature heat treatment is performed on a carbon-implanted substrate as in JP-A-2002-353434, crystal defects (for example, crystal lattice strain) formed by carbon implantation are reduced. As a result, the function of gettering sinks is likely to deteriorate.
For example, any of the following silicon substrates is used for a solid-state imaging device: a silicon substrate obtained by an intrinsic gettering method that performs an oxygen precipitate heat treatment before epitaxial growth to form an oxygen precipitate; and a silicon substrate obtained by an ion implantation method that implants ions, such as carbon ions, into a silicon substrate. There is a concern that heavy metal contamination will occur in both of the two kinds of substrates while the silicon substrates are manufactured. On the other hand, in the silicon substrate obtained by the extrinsic gettering method, for example, backside damage is formed on the rear surface thereof. Therefore, in the case of the silicon substrate obtained by the extrinsic gettering method, particles are generated from the rear surface of the silicon substrate during a device process, which results in a device defect.
When a gettering layer is formed on the silicon substrate by implanting ions, such as carbon ions, for example, carbon, serving as a gettering sink, tends to be diffused by a heat treatment of the subsequent process, such as the device process, and carbon concentration tends to be lowered. As a result, the silicon substrate does not have sufficient gettering capability.